Senior System Verification Engineer – NETC & PCIe
Role description
Job Title: Senior System Verification Engineer – NETC & PCIe
Location: Nijmegen, Netherlands / Remote
Duration: 11 months
Start Date: ASAP
Experience: 7+ years
Role Overview
We are looking for an experienced Senior System Verification Engineer with expertise in NETC and PCIe to validate networking and high-speed interface functionality at the SoC level.
This role focuses on system-level verification , software-driven verification, and end-to-end validation of networking subsystems. You will work closely with architecture, design, firmware, and software teams to ensure robust verification coverage across complex SoC platforms.
Key Responsibilities
- Develop comprehensive verification plans for NETC and PCIe subsystems
- Create system-level test scenarios covering functional, performance, and stress use cases
- Develop software-driven verification tests and supporting infrastructure
- Validate subsystem interactions and overall SoC behaviour
- Perform detailed debugging and root-cause analysis
- Collaborate with architecture, design, firmware, and software teams throughout the verification lifecycle
Required Skills & Experience
- Bachelor's or Master's degree in Electronics, Computer Engineering, or a related field
- 7+ years of experience in SoC or System Verification
- Strong knowledge of NETC architecture and PCIe protocols
- Experience with software development within a verification environment
- Strong hands‑on experience with SystemVerilog and UVM
- Experience using Cadence Xcelium
- Excellent debugging and problem‑solving skills
Preferred Skills
- Knowledge of networking stacks and high-speed interfaces
- Experience with performance verification and traffic analysis