IP Verification Engineer — Hybrid FPGA/ASIC Innovator
Advanced Micro Devices
Role description
AMD in Markham, Ontario is seeking a Verification Engineer in the AECG Group to verify FPGA/ASIC IP, collaborate with architecture, IP design, PD, and product engineers for first pass silicon success.
You will write UVM-based testbenches, develop test plans, and run regressions while maintaining strong collaboration across sites and time zones. Hybrid work model with ongoing learning opportunities.
#J-18808-Ljbffr
